HD64F2149 Datasheet, PDF (743/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

EXCL
t_EXCLH
t_EXCLL
V_CC × 0.5
t_EXCLr
t_EXCLf
Figure 23.8 Subclock Input Timing
When Subclock is not Needed: Do not enable subclock input when the subclock is not needed
23.8 Subclock Waveform Shaping Circuit
To eliminate noise in the subclock input from the EXCL pin, this circuit samples the clock using a
clock obtained by dividing the ø clock. The sampling frequency is set with the NESEL bit in
LPWRCR. For details, see section 24.2.2, Low-Power Control Register (LPWRCR). The clock is
not sampled in subactive mode, subsleep mode, or watch mode.
23.9 Clock Selection Circuit
This circuit selects the system clock used in the MCU.
The clock signal generated in the EXTAL/XTAL oscillator is selected as a system clock, when the
MCU is returned from high-speed mode, medium-speed mode, sleep mode, reset state, standby
mode.
In sub-active mode, sub-sleep mode and watch mode, the sub-clock signal input from or EXCL
pin is selected as a sytem clock. In these modes, modules, such as CPU, TMR0, TMR1, WDT0,
WDT1, and I/O ports, operate on ø SUB clock. In addition, the count clock and sampling clock are
derived by frequency division from ø SUB.
Note: See figure 23.1.
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