HD64F2149 Datasheet, PDF (563/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

• Notes on Start Condition Issuance for Retransmission
Figure 16.18 shows the timing of start condition issuance for retransmission, and the timing for
subsequently writing data to ICDR, together with the corresponding flowchart. After start
condition issuance is done and determined the start condition, write the transmit data to ICDR,
as shown below.
IRIC = 1 ?
No
[1]
Yes
Clear IRIC in ICSR
Start condition
issuance ?
Yes
Read SCL pin
No _{Other processing}
[2]
SCL = Low ?
No
Yes
Write BBSY = 1,
SCP = 0 (ICSR)
[3]
[1] Wait for end of 1-byte transfer
[2] Determine whether SCL is low
[3] Issue restart condition instruction for transmission
[4] Detremine whether start condition is generated or not
[5] Set transmit data (slave address + R/W)
Note: Program so that processing from [3] to [5] is
executed continuously.
IRIC = 1 ?
No
[4]
Yes
Write transmit data to ICDR
[5]
SCL
9
start condition
(retransmission)
SDA
ACK
IRIC
bit7
Data output
[3] Start condition instruction
issuance
[1] IRIC determination [2] Determination
of SCL = Low
[4] IRIC determination
[5] ICDR write (next transmit data)
Figure 16.19 Flowchart and Timing of Start Condition Instruction Issuance for
Retransmission
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