HD64F2149 Datasheet, PDF (1025/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Hardware
standby
PBn
Mode 2, 3
EXPE
CS input enable
Reset
R
QD
External
PBnDDR
C
address write
WPBD
EXPE
ABW
(D2, D3)
RPBO
Reset
R
QD
PBnODR
C
WPB
RPB
External address
read _{(D2, D3)}
WPBD : Write to PBDDR
WPB : Write to PBODR
RPBO : Read PBODR
RPB : Read port B
n = 2, 3
HIF : XBS
CS3 input
CS4 input
Wakeup event
interrupt input
WUEMRn
Figure C.41 Port B Block Diagram (Pins PB2 and PB3)
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