HD64F2149 Datasheet, PDF (176/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

6.3.2 Advanced Mode
The initial state of the external space is basic bus interface, three-state access space. In ROM-
enabled expanded mode, the space excluding the on-chip ROM, on-chip RAM, and internal I/O
registers is external space. The on-chip RAM is enabled when the RAME bit in the system control
register (SYSCR) is set to 1; when the RAME bit is cleared to 0, the on-chip RAM is disabled and
the corresponding space becomes external space.
6.3.3 Normal Mode
The initial state of the external memory space is basic bus interface, three-state access space. In
ROM-disabled expanded mode, the space excluding the on-chip RAM and internal I/O registers is
external space. In ROM-enabled expanded mode, the space excluding the on-chip ROM, on-chip
RAM, and internal I/O registers is external space. The on-chip RAM is enabled when the RAME
bit in the system control register (SYSCR) is set to 1; when the RAME bit is cleared to 0, the on-
chip RAM is disabled and the corresponding space becomes external space.
6.3.4 I/O Select Signal
In the H8S/2169 or H8S/2149, an I/O select signal (IOS) can be output, with the signal output
going low when the designated external space is accessed.
Figure 6.2 shows an example of IOS signal output timing.
Bus cycle
T₁
T₂
T₃
ø
Address bus
External address in IOS set range
IOS
Figure 6.2 IOS Signal Output Timing
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