HD64F2149 Datasheet, PDF (511/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

ø
SCL
SDA
PS
Noise
canceler
Formatless dedicated
clock (channel 0 only)
Clock
control
Bus state
decision
circuit
Arbitration
decision
circuit
Output data
control
circuit
Noise
canceler
ICCR
ICMR
ICSR
ICDRT
ICDRS
ICDRR
Address
comparator
SAR, SARX
Legend:
ICCR: I²C bus control register
ICMR: I²C bus mode register
ICSR: I²C bus status register
ICDR: I²C bus data register
SAR: Slave address register
SARX: Slave address register X
PS: Prescaler
Interrupt
generator
Figure 16.1 Block Diagram of I²C Bus Interface
Interrupt
request
477