HD64F2149 Datasheet, PDF (571/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bit 6—Keyboard Clock Out (KCLKO): Controls KBC clock I/O pin output.
Bit 6
KCLKO
0
1
Description
Keyboard buffer controller clock I/O pin is low
Keyboard buffer controller clock I/O pin is high
(Initial value)
Bit 5—Keyboard Data Out (KDO): Controls KBC data I/O pin output.
Bit 5
KDO
0
1
Description
Keyboard buffer controller data I/O pin is low
Keyboard buffer controller data I/O pin is high
(Initial value)
Bit 4—Reserved: This bit cannot be modified and is always read as 1.
Bits 3 to 0—Receive Counter (RXCR3 to RXCR0): These bits indicate the received data bit.
Their value is incremented on the fall of KCLK. These bits cannot be modified.
The receive counter is initialized to 0000 by a reset and when 0 is written in KBE. Its value returns
to 0000 after a stop bit is received.
Bit 3
RXCR3
0
1
Bit 2
RXCR2
0
1
0
1
Bit 1
RXCR1
0
1
0
1
0
1
—
Bit 0
RXCR0
0
1
0
1
0
1
0
1
0
1
0
1
—
Receive Data Contents
—
Start bit
KB0
KB1
KB2
KB3
KB4
KB5
KB6
KB7
Parity bit
—
—
(Initial value)
537