HD64F2149 Datasheet, PDF (670/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

20.2.3 A/D Control Register (ADCR)
Bit
7
6
5
4
3
2
1
0
TRGS1 TRGS0 —
—
—
—
—
—
Initial value
0
0
1
1
1
1
1
1
Read/Write R/W
R/W
—
—
—
—
—
—
ADCR is an 8-bit readable/writable register that enables or disables external triggering of A/D
conversion operations.
ADCR is initialized to H'3F by a reset, and in standby mode, watch mode, subactive mode,
subsleep mode, and module stop mode.
Bits 7 and 6—Timer Trigger Select 1 and 0 (TRGS1, TRGS0): These bits select enabling or
disabling of the start of A/D conversion by a trigger signal. Only set bits TRGS1 and TRGS0
while conversion is stopped.
Bit 7
TRGS1
0
1
Bit 6
TRGS0
0
1
0
1
Description
Start of A/D conversion by external trigger is disabled
(Initial value)
Start of A/D conversion by external trigger is disabled
Start of A/D conversion by external trigger (8-bit timer) is enabled
Start of A/D conversion by external trigger pin is enabled
Bits 5 to 0—Reserved: Should always be written with 1.
636