HD64F2149 Datasheet, PDF (538/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

MSTPCRL Bit 4—Module Stop (MSTP4): Specifies IIC channel 0 module stop mode.
MSTPCRL
Bit 4
MSTP4 Description
0
IIC channel 0 module stop mode is cleared
1
IIC channel 0 module stop mode is set
(Initial value)
MSTPCRL Bit 3—Module Stop (MSTP3): Specifies IIC channel 1 module stop mode.
MSTPCRL
Bit 3
MSTP3 Description
0
IIC channel 1 module stop mode is cleared
1
IIC channel 1 module stop mode is set
(Initial value)
16.3 Operation
16.3.1 I²C Bus Data Format
The I²C bus interface has serial and I²C bus formats.
The I²C bus formats are addressing formats with an acknowledge bit. These are shown in figures
16.3 (a) and (b). The first frame following a start condition always consists of 8 bits.
IIC channel 0 only is capable of formatless operation, as shown in figure 16.4.
The serial format is a non-addressing format with no acknowledge bit. This is shown in figure
16.5.
Figure 16.6 shows the I²C bus timing.
The symbols used in figures 16.3 to 16.6 are explained in table 16.4.
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