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HD64F2149 Datasheet, PDF (955/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer
SYSCR—System Control Register
H'FFC4
System
Bit
7
6
5
4
3
2
1
0
CS2E IOSE INTM1 INTM0 XRST NMIEG HIE RAME
Initial value
0
0
0
0
1
0
0
1
Read/Write R/W
R/W
R
R/W
R
R/W
R/W
R/W
NMI edge select
0 Falling edge
1 Rising edge
RAM Enable
0 On-chip RAM is disabled
1 On-chip RAM is enabled
Host interface enable
0 Addresses H'(FF)FFF0 to H'(FF)FFF7
and H'(FF)FFFC to H'(FF)FFFF are
used for access to 8-bit timer (channel
X and Y) data registers and control
registers, and timer connection
control registers
1 Addresses H'(FF)FFF0 to H'(FF)FFF7
and H'(FF)FFFC to H'(FF)FFFF are
used for access to host interface data
registers and control registers, and
keyboard controller and MOS input
pull-up control registers
External reset
0 Reset generated by watchdog timer overflow
1 Reset generated by an external reset
Interrupt control selection mode 1 and 0
Bit 5 Bit 4 Interrupt
INTM1 INTM0 control mode
Description
0
0
0
Interrupts controlled by I bit (Initial value)
1
1
Interrupts controlled by I and UI bits, and ICR
1
0
2
Cannot be used in the LSI
1
3
Cannot be used in the LSI
IOS enable
0 The AS/IOS pin functions as the address strobe pin
(Low output when accessing an external area)
1 The AS/IOS pin functions as the I/O strobe pin
(Low output when accessing a specified address from H'(FF)F000 to H'(FF)F7FF)
CS2 enable
SYSCR HICR
Bit 7
Bit 0
CS2E FGA20E
0
0
1
1
0
1
Description
CS2 pin function halted
(CS2 fixed high internally)
CS2 pin function selected for P81/CS2 pin
CS2 pin function selected for P90/ECS2 pin
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