HD64F2149 Datasheet, PDF (593/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bit 1—CS3 Enable (CS3E): Enables or disables host interface channel 3 functions in slave mode.
When these functions are enabled, channel 3 pins are enabled and processing can be performed for
data transfer between the slave and the host processors.
Bit 1
CS3E
0
1
Description
Host interface pin channel 3 functions disabled
Host interface pin channel 3 functions enabled
(Initial value)
Bit 0—Host Interface Enable Bit (HI12E): Enables or disables host interface functions in
single-chip mode. When the host interface functions are enabled, processing is performed for data
transfer between the slave and the host processors using the pins determined by bits CS2E to
CS4E, FGA20E, and SDE.
Bit 0
HI12E
0
1
Description
Host interface functions are disabled
Host interface functions are enabled
(Initial value)
18A.2.3 Host Interface Control Register (HICR)
• HICR
Bit
7
6
5
4
—
—
—
—
Initial value
1
1
1
1
Slave Read/Write —
—
—
—
Host Read/Write —
—
—
—
3
2
1
0
— IBFIE2 IBFIE1 FGA20E
1
0
0
0
—
R/W R/W R/W
—
—
—
—
• HICR2
Bit
7
6
5
4
3
2
1
0
—
—
—
—
— IBFIE4 IBFIE3 —
Initial value
1
1
1
1
1
0
0
0
Slave Read/Write —
—
—
—
—
R/W R/W
—
Host Read/Write —
—
—
—
—
—
—
—
HICR is an 8-bit readable/writable register which controls host interface channel 1 and 2 interrupts
and the fast A20 gate function. HICR2 is an 8-bit readable/writable register which controls host
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