HD64F2149 Datasheet, PDF(610/1035 Page) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

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HD64F2149 Datasheet, PDF (610/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

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18B.1.4 Register Configuration

Table 18B.2 lists the HIF:LPC registers.

Table 18B.2 Register Configuration

Name

System control register

System control register 2

Host interface control

register 0

Host interface control

register 1

Host interface control

register 2

Host interface control

register 3

LPC channel 3 address

register

Input data register 1

Output data register 1

Status register 1

Input data register 2

Output data register 2

Status register 2

Input data register 3

Output data register 3

Status register 3

Two-way register 0MW

Two-way register 0SW

Abbrevia-

tion

SYSCR

SYSCR2

HICR0

R/W

Slave Host

R/W*1 â

R/W

â

R/W

â

Initial

Value

H'09

H'00

H'00

Slave

Host

Address*3 Address*4

H'FFC4 â

H'FF83 â

H'FE40 â

HICR1

R/W

â

H'00 H'FE41 â

HICR2

R/W

â

H'00 H'FE42 â

HICR3

R

â

â

H'FE43 â

LADR3H R/W

â

LADR3L R/W

â

IDR1

R

W

ODR1

STR1

IDR2

R/W

R

R/(W)*2 R

R

W

ODR2

STR2

IDR3

R/W

R

R/(W)*2 R

R

W

ODR3

R/W

R

STR3

R/(W)*2 R

TWR0MW R

W

TWR0SW W

R

H'00

H'00

â

â

H'00

â

â

H'00

â

â

H'00

â

â

H'FE34

H'FE35

H'FE38

H'FE39

H'FE3A

H'FE3C

H'FE3D

H'FE3E

H'FE30

H'FE31

H'FE32

H'FE20

H'FE20

â

â

H'0060 and

H'0064

H'0060

H'0064

H'0062 and

H'0066

H'0062

H'0066

LADR3*5

+0 and +4

LADR3*5 +0

LADR3*5 +4

LADR3*6

+16 /â16

LADR3*6

+16 /â16

576

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