HD64F2149 Datasheet, PDF (372/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

TCR
STCR
Bit 2 Bit 1 Bit 0 Bit 1 Bit 0
Channel CKS2 CKS1 CKS0 ICKS1 ICKS0 Description
X
0 0 0 — — Clock input disabled
(Initial value)
0 0 1 — — Counted on ø internal clock source
0 1 0 — — ø/2 internal clock source, counted on the falling edge
0 1 1 — — ø/4 internal clock source, counted on the falling edge
1 0 0 — — Clock input disabled
Y
0 0 0 — — Clock input disabled
(Initial value)
0 0 1 — — ø/4 internal clock source, counted on the falling edge
0 1 0 — — ø/256 internal clock source, counted on the falling
edge
0 1 1 — — ø/2048 internal clock source, counted on the falling
edge
1 0 0 — — Clock input disabled
Common 1 0 1 — — External clock source, counted at rising edge
1 1 0 — — External clock source, counted at falling edge
1 1 1 — — External clock source, counted at both rising and
falling edges
Note: * If the clock input of channel 0 is the TCNT1 overflow signal and that of channel 1 is the
TCNT0 compare-match signal, no incrementing clock will be generated. Do not use this
setting.
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