HD64F2149 Datasheet, PDF (346/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Bit 6
OCRAMS Description
0
The normal operating mode is specified for OCRA
(Initial value)
1
The operating mode using OCRAR and OCRAF is specified for OCRA
Bit 5—Input Capture Register Select (ICRS): The same addresses are shared by ICRA and
OCRAR, by ICRB and OCRAF, and by ICRC and OCRDM. The ICRS bit determines which
registers are selected when the shared addresses are read or written to. The operation of ICRA,
ICRB, and ICRC is not affected.
Bit 5
ICRS
0
1
Description
The ICRA, ICRB, and ICRC registers are selected
The OCRAR, OCRAF, and OCRDM registers are selected
(Initial value)
Bit 4—Output Compare Register Select (OCRS): OCRA and OCRB share the same address.
When this address is accessed, the OCRS bit selects which register is accessed. This bit does not
affect the operation of OCRA or OCRB.
Bit 4
OCRS
0
1
Description
The OCRA register is selected
The OCRB register is selected
(Initial value)
Bit 3—Output Enable A (OEA): Enables or disables output of the output compare A signal
(FTOA).
Bit 3
OEA
0
1
Description
Output compare A output is disabled
Output compare A output is enabled
(Initial value)
Bit 2—Output Enable B (OEB): Enables or disables output of the output compare B signal
(FTOB).
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