HD64F2149 Datasheet, PDF (510/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

• Selection of 16 internal clocks (in master mode)
• Direct bus drive (with SCL and SDA pins)
 Two pins—P52/SCL0 and P97/SDA0—(normally NMOS push-pull outputs) function as
NMOS open-drain outputs when the bus drive function is selected.
 Two pins—P86/SCL1 and P42/SDA1—(normally CMOS pins) function as NMOS-only
outputs when the bus drive function is selected.
• Automatic switching from formatless mode to I²C bus format (channel 0 only)
 Formatless operation (no start/stop conditions, non-addressing mode) in slave mode
 Operation using a common data pin (SDA) and independent clock pins (VSYNCI, SCL)
 Automatic switching from formatless mode to I²C bus format on the fall of the SCL pin
16.1.2 Block Diagram
Figure 16.1 shows a block diagram of the I²C bus interface.
Figure 16.2 shows an example of I/O pin connections to external circuits. Channel 0 I/O pins and
channel 1 I/O pins differ in structure, and have different specifications for permissible applied
voltages. For details, see section 25, Electrical Characteristics.
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