HD64F2149 Datasheet, PDF (37/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Item
Data transfer
controller (DTC)
Specifications
• Can be activated by internal interrupt or software
• Multiple transfers or multiple types of transfer possible for one activation
source
• Transfer possible in repeat mode, block transfer mode, etc.
• Request can be sent to CPU for interrupt that activated DTC
16-bit free-running •
timer module (FRT:
1 channel)
•
•
One 16-bit free-running counter (usable for external event counting)
Two output compare outputs
Four input capture inputs (with buffer operation capability)
8-bit timer module Each channel has:
(2 channels: TMR0,
TMR1)
•
One 8-bit up-counter (usable for external event counting)
• Two timer constant registers
• The two channels can be connected
Timer connection Input/output and FRT, TMR1, TMRX, TMRY can be interconnected
and 8-bit timer
module (TMR)
• Measurement of input signal or frequency-divided waveform pulse width
(2 channels: TMRX, ^{and cycle (FRT, TMR1)}
TMRY)
• Output of waveform obtained by modification of input signal edge (FRT,
TMR1)
• Determination of input signal duty cycle (TMRX)
• Output of waveform synchronized with input signal (FRT, TMRX, TMRY)
• Automatic generation of cyclical waveform (FRT, TMRY)
Watchdog timer
module (WDT:
2 channels)
8-bit PWM timer
(PWM)
• Watchdog timer or interval timer function selectable
• Subclock operation capability (channel 1 only)
• Up to 16 outputs
• Pulse duty cycle settable from 0 to 100%
• Resolution: 1/256
• 625 kHz maximum carrier frequency (10 MHz operation)
14-bit PWM timer
(PWMX)
• Up to 2 outputs
• Resolution: 1/16384
• 156.25 kHz maximum carrier frequency (10 MHz operation)
Serial communi-
cation interface
(SCI: 2 channels,
SCI0, SCI1)
• Asynchronous mode or synchronous mode selectable
• Multiprocessor communication function
3