HD64F2149 Datasheet, PDF (513/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

16.1.4 Register Configuration
Table 16.2 summarizes the registers of the I²C bus interface.
Table 16.2 Register Configuration
Channel Name
Abbreviation R/W
Initial Value Address*¹
0
I²C bus control register ICCR0
R/W
H'01
H'FFD8
I²C bus status register ICSR0
R/W
H'00
H'FFD9
I²C bus data register
ICDR0
R/W
—
H'FFDE*²
I²C bus mode register ICMR0
R/W
H'00
H'FFDF*²
Slave address register SAR0
R/W
H'00
H'FFDF*²
Second slave address
register
SARX0
R/W
H'01
H'FFDE*²
1
I²C bus control register ICCR1
R/W
H'01
H'FF88
I²C bus status register ICSR1
R/W
H'00
H'FF89
I²C bus data register
ICDR1
R/W
—
H'FF8E*²
I²C bus mode register ICMR1
R/W
H'00
H'FF8F*²
Slave address register SAR1
R/W
H'00
H'FF8F*²
Second slave address
register
SARX1
R/W
H'01
H'FF8E*²
Common Serial/timer control
register
STCR
R/W
H'00
H'FFC3
DDC switch register
DDCSWR
R/W
H'0F
H'FEE6
Module stop control
register
MSTPCRH
R/W
H'3F
H'FF86
MSTPCRL
R/W
H'FF
H'FF87
Notes: 1. Lower 16 bits of the address.
2. The register that can be written or read depends on the ICE bit in the I²C bus control
register. The slave address register can be accessed when ICE = 0, and the I²C bus
mode register can be accessed when ICE = 1.
The I²C bus interface registers are assigned to the same addresses as other registers.
Register selection is performed by means of the IICE bit in the serial/timer control
register (STCR).
479