HD64F2149 Datasheet, PDF (146/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

Figure 5.4 shows the timing of IRQnF setting.
ø
IRQn
input pin
IRQnF
Figure 5.4 Timing of IRQnF Setting
The vector numbers for IRQ7 to IRQ0 interrupt exception handling are 23 to 16.
Detection of IRQ7 to IRQ0 interrupts does not depend on whether the relevant pin has been set for
input or output. Therefore, when a pin is used as an external interrupt input pin, clear the
corresponding DDR bit to 0 and do not use the pin as an I/O pin for another function.
When IRQ6 pin is assigned as IRQ6 interrupt input pin, then clear the KMIMR6 bit to 0.
When the IRQ7 pin is used as the IRQ7 interrupt input pin, bits KMIMR15 to KMIMR8 and
WUEMRB7 to WUEMRB0 must all be set to 1. If any of these bits is cleared to 0, an IRQ7
interrupt input from the IRQ7 pin will be ignored.
As interrupt request flags IRQ7F to IRQ0F are set when the setting condition is met, regardless of
the IER setting, only the necessary flags should be referenced.
Interrupts KIN15 to KIN0 and WUE7 to WUE0: Interrupts KIN15 to KIN0 and WUE7 to
WUE0 are requested by input signals at pins KIN15 to KIN0 and WUE7 to WUE0. When any of
pins KIN15 to KIN0 or WUE7 to WUE0 are used as key-sense inputs or wakeup events, the
corresponding KMIMR or WUEMR bits should be cleared to 0 to enable those key-sense input
interrupts or wakeup event interrupts. The remaining unused key-sense input KMIMR bits and
WUEMR bits should be set to 1 to disable those interrupts. Interrupts WUE7 to WUE0 and KIN15
to KIN8 correspond to the IRQ7 interrupt, and interrupts KIN7 to KIN0 correspond to the IRQ6
interrupt. Interrupt request generation pin conditions, interrupt request enabling, interrupt control
level setting, and interrupt request status indications, are all in accordance with the IRQ7 and
IRQ6 interrupt settings.
When pins KIN7 to KIN0, KIN15 to KIN8, or WUE7 to WUE0 are used as key-sense interrupt or
wakeup event interrupt input pins, either low-level sensing or falling-edge sensing must be
designated as the interrupt sense condition for the corresponding interrupt source (IRQ6 or IRQ7).
112