HD64F2149 Datasheet, PDF (12/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

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Revision (See Manual for Details)
20.6 Usage Notes
Permissible Signal Source Impedance:
Impedance value amended
21.1.1 Block Diagram
Figure 21.1 Block Diagram of RAM
Address amended
21.3.1 Example Mode
Address amended when the RAME bit is cleared to 0
21.3.2 Single-Chip Mode Description amended
22.4.1 Features
Programming/erase times: Amended
22.4.3 Flash Memory
Operating Modes
Figure 22.3 Flash Memory Mode Transitions
Bit name amended (User mode ⇔ User program mode)
22.5.2 Flash Memory
Control Register 2
Bits 6 to 2: Description amended
22.6.1 Boot Mode
Figure 22.8 Boot Mode Execution Procedure
Amended
Table 22.8 System Clock Frequencies for which
Automatic Adjustment of the Chip Bit Rate is Possible
System clock frequency amended
On-Chip RAM Area Divisions in Boot Mode:
Description amended
Figure 22.10 RAM Areas in Boot Mode
Amended
22.10.1 Programmer Mode Note added
Setting
22.11 Flash Memory
Description for PROM programmer amended
Programming and Erasing
Precautions
23.3.1 Connecting a
Crystal Resonator
Table 23.2 Damping Resistance Value
φ = 12 MHz or more deleted
Table 23.3 Crystal Resonator Parameters
φ = 12 MHz or more deleted
23.3.2 External Clock Input Table 23.4 External Clock Input Conditions
Vcc range amended
Table 23.5 External Clock Output Setting Delay Time
Conditions amended
23.7 Subclock Input Circuit Table 23.6 Subclock Input Conditions
Vcc range amended
23.9 Clock Selection Circuit Added