HD64F2149 Datasheet, PDF (894/1035 Pages) Renesas Technology Corp – Hitachi 16-Bit Single-Chip Microcomputer

STR3—Status Register 3
H'FE32
HIF (LPC)
Bit
Initial value
Slave Read/Write
Host Read/Write
7
IBF3B
0
R
R
6
OBF3B
0
R/(W)*
R
5
MWMF
0
R
R
4
SWMF
0
R/(W)*
R
3
C/D3
0
R
R
2
DBU32
0
R/W
R
1
IBF3A
0
R
R
0
OBF3A
0
R/(W)*
R
Output data register full
0 [Clearing condition]
Host reads ODR using
I/O read cycle, or slave
writes 0 to OBF bit
1 [Setting condition]
Slave writes to ODR
Input data register full
0 [Clearing condition]
Slave reads IDR
1 [Setting condition]
Host writes to IDR using I/O write cycle
User-defined bit
Command/data
0 Input data register (IDR) contents are data
1 Input data register (IDR) contents are a command
Slave write mode flag
0 [Clearing condition]
Host reads TWR15 using I/O read cycle, or slave writes 0 to SWMF bit
1 [Setting condition]
Slave writes to TWR0 when MWMF = 0
Master write mode flag
0 [Clearing condition]
Slave reads TWR15
1 [Setting condition]
Host writes to TWR0 using I/O write cycle when SWMF = 0
Two-way register output data full
0 [Clearing condition]
Host reads TWR15 using I/O read cycle, or slave writes 0 to OBF3B bit
1 [Setting condition]
Slave writes to TWR15
Two-way register input data full
0 [Clearing condition]
Slave reads TWR15
1 [Setting condition]
Host writes to TWR15 using I/O write cycle
Note: * Only 0 can be written, to clear the flag.
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