HD6417750RF240DV Datasheet, PDF (984/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 22 Electrical Characteristics
SH7750, SH7750S, SH7750R Group
Table 22.28 Clock and Control Signal Timing (HD6417750SF200 (V))
V_DDQ = 3.0 to 3.6 V, V_DD = 1.8 V, T_a = –20 to +75°C, C_L = 30 pF
Item
Symbol Min
EXTAL
PLL2
1/2 divider
f
16
EX
clock input operating operating
frequency
1/2 divider not f_EX
8
operating
PLL2 not 1/2 divider
f_EX
2
operating operating
1/2 divider not f_EX
1
operating
EXTAL clock input cycle time
t
15
EXcyc
EXTAL clock input low-level pulse width t
3.5
EXL
EXTAL clock input high-level pulse width t
3.5
EXH
EXTAL clock input rise time
t_EXr
—
EXTAL clock input fall time
t
—
EXf
CKIO clock PLL2 operating
f_OP
25
output
PLL2 not operating
f_OP
1
CKIO clock output cycle time
t_cyc
10
CKIO clock output low-level pulse width t
1
CKOL1
CKIO clock output high-level pulse width t
1
CKOH1
CKIO clock output rise time
t
—
CKOr
CKIO clock output fall time
t
—
CKOf
CKIO clock output low-level pulse width t_CKOL2
3
CKIO clock output high-level pulse width t
3
CKOH2
Power-on oscillation settling time
t_OSC1
10
Power-on oscillation settling time/mode t_OSCMD
10
settling
SCK2 reset setup time
SCK2 reset hold time
MD reset setup time
MD reset hold time
RESET assert time
t
20
SCK2RS
t
20
SCK2RH
t
3
MDRS
t
20
MDRH
t_RESW
20
Max Unit Figure
67
MHz
34
67
34
1000
—
—
4
4
67
67
1000
—
—
3
3
—
—
—
—
ns 22.1
ns 22.1
ns 22.1
ns 22.1
ns 22.1
MHz
MHz
ns 22.2 (1)
ns 22.2 (1)
ns 22.2 (1)
ns 22.2 (1)
ns 22.2 (1)
ns 22.2 (2)
ns 22.2 (2)
ms 22.3, 22.5
ms 22.3, 22.5
—
ns 22.11
—
ns 22.3, 22.5, 22.11
—
t
22.12
cyc
—
ns 22.3, 22.5, 22.12
—
t_cyc 22.3, 22.4, 22.5,
22.6, 22.11
Page 932 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013