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HD6417750RF240DV Datasheet, PDF (831/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series
SH7750, SH7750S, SH7750R Group
Section 17 Smart Card Interface
Bit 0—Smart Card Interface Mode Select (SMIF): Enables or disables the smart card interface
function.
Bit 0: SMIF
0
1
Description
Smart card interface function is disabled
Smart card interface function is enabled
(Initial value)
17.2.2 Serial Mode Register (SCSMR1)
Bit 7 of SCSMR1 has a different function in smart card interface mode.
Bit: 7
GM(C/A)
Initial value: 0
R/W: R/W
6
CHR
0
R/W
5
PE
0
R/W
4
3
2
O/E STOP MP
0
0
0
R/W R/W R/W
1
CKS1
0
R/W
0
CKS0
0
R/W
Bit 7—GSM Mode (GM): Sets the smart card interface function to GSM mode.
With the normal smart card interface, this bit is cleared to 0. Setting this bit to 1 selects GSM
mode, an additional mode for controlling the timing for setting the TEND flag that indicates
completion of transmission, and the type of clock output used. The details of the additional clock
output control mode are specified by the CKE1 and CKE0 bits in the serial control register
(SCSCR1). In GSM mode, the pulse width is guaranteed when SCK start/stop specifications are
made by CKE1 and CKE0.
Bit 7: GM
0
Description
Normal smart card interface mode operation
(Initial value)
• The TEND flag is set 12.5 etu after the beginning of the start bit
• Clock output on/off control only
1
GSM mode smart card interface mode operation
• The TEND flag is set 11.0 etu after the beginning of the start bit
• Clock output on/off and fixed-high/fixed-low control (set in SCSCR1)
Note: etu: Elementary time unit (time for transfer of 1 bit)
Bits 6 to 0: Operate in the same way as for the normal SCI. See section 15, Serial Communication
Interface (SCI), for details. With the smart card interface, the following settings should be used:
CHR = 0, PE = 1, STOP = 1, MP = 0.
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
Page 779 of 1076