HD6417750RF240DV Datasheet, PDF (681/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

SH7750, SH7750S, SH7750R Group
Section 14 Direct Memory Access Controller (DMAC)
Four requests can be queued
CLK
1st 2nd 3rd 4th
5th
DBREQ
BAVL
TR
Handshaking is necessary
to send additional requests
A25–A0
D63–D0
RAS,
CAS, WE
TDACK
ID1, ID0
RA
CA
CA
CA
CA
D0 D1 D2 D3 D0 D1 D2 D3 D0 D1 D2 D3
BA
WT
WT
WT
WT
Must be ignored
(no request transmitted)
Figure 14.50 Single Address Mode/Burst Mode/External Device → External Bus Data
Transfer/Direct Data Transfer Request to Channel 2
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
Page 629 of 1076