HD6417750RF240DV Datasheet, PDF (1011/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

SH7750, SH7750S, SH7750R Group
Section 22 Electrical Characteristics
CKIO
A25–A0
CSn
RD/WR
RD
D63–D0
(read)
WEn
D63–D0
(write)
BS
TS1
T1
T2
TH1
t_AD
t_CSD
t_RWD
t_RSD
t_WED1
t_WDD
t_AD
t_CSD
t_RWD
t_RSD
*
t_RSD
t_RDS
t_RDH
t_WEDF t_WEDF
t_WDD
t_WDD
t_BSD
t_BSD
RDY
DACKn
(SA: IO ← memory)
t_DACD
DACKn
(SA: IO → memory)
t_DACD
t_DACDF
t_DACD
t_DACDF
DACKn
(DA)
t_DACD
t_DACD
Legend:
IO: DACK device
SA: Single address DMA transfer
DA: Dual address DMA transfer
DACK set to active-high
Note: * SH7750R only
Figure 22.18 SRAM Bus Cycle: Basic Bus Cycle (No Wait, Address Setup/Hold Time
Insertion, AnS = 1, AnH = 1)
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
Page 959 of 1076