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HD6417750RF240DV Datasheet, PDF (391/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series
SH7750, SH7750S, SH7750R Group
Section 12 Timer Unit (TMU)
12.1.4 Register Configuration
Table 12.2 summarizes the TMU registers.
Table 12.2 TMU Registers
Initialization
Chan-
nel Name
Power-
Stand-
Abbre-
On
Manual by
Area 7
viation R/W Reset Reset Mode Initial Value P4 Address Address
Access
Size
Com- Timer
mon output
control
register
TOCR R/W Ini-
Ini-
Held
tialized tialized
H'00
H'FFD80000 H'1FD80000 8
Timer
start
register
TSTR
R/W Ini-
Ini-
Ini-
H'00
tialized tialized tialized
*1
H'FFD80004 H'1FD80004 8
Timer
TSTR2
start
*3
register 2
R/W Ini-
tialized
Held
Held
H'00
H'FE100004 H'1E100004 8
0
Timer
TCOR0 R/W Ini-
Ini-
Held H'FFFFFFFF H'FFD80008 H'1FD80008 32
constant
tialized tialized
register 0
Timer
TCNT0 R/W Ini-
Ini-
Held*2 H'FFFFFFFF H'FFD8000C H'1FD8000C 32
counter 0
tialized tialized
Timer
TCR0
control
register 0
R/W Ini-
Ini-
Held
tialized tialized
H'0000
H'FFD80010 H'1FD80010 16
1
Timer
TCOR1 R/W Ini-
Ini-
Held H'FFFFFFFF H'FFD80014 H'1FD80014 32
constant
tialized tialized
register 1
Timer
TCNT1 R/W Ini-
Ini-
Held*2 H'FFFFFFFF H'FFD80018 H'1FD80018 32
counter 1
tialized tialized
Timer
TCR1
control
register 1
R/W Ini-
Ini-
Held
tialized tialized
H'0000
H'FFD8001C H'1FD8001C 16
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
Page 339 of 1076