HD6417750RF240DV Datasheet, PDF (307/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

SH7750, SH7750S, SH7750R Group
Section 8 Pipelining
Functional
Category No. Instruction
Single-
182 FABS
FRn
precision _{183 FADD}
floating-
FRm,FRn
point
184 FCMP/EQ FRm,FRn
instructions _{185 FCMP/GT FRm,FRn}
186 FDIV
FRm,FRn
187 FLOAT
188 FMAC
189 FMUL
190 FNEG
191 FSQRT
FPUL,FRn
FR0,FRm,FRn
FRm,FRn
FRn
FRn
192 FSUB
FRm,FRn
193 FTRC
FRm,FPUL
194 FMOV DRm,DRn
195 FMOV @Rm,DRn
196 FMOV @Rm+,DRn
197 FMOV @(R0,Rm),DRn
198 FMOV DRm,@Rn
199 FMOV DRm,@-Rn
200 FMOV DRm,@(R0,Rn)
Double- 201 FABS
DRn
precision _{202 FADD}
floating-
DRm,DRn
point
203 FCMP/EQ DRm,DRn
instructions _{204 FCMP/GT DRm,DRn}
205 FCNVDS DRm,FPUL
206 FCNVSD FPUL,DRn
207 FDIV
DRm,DRn
208 FLOAT
209 FMUL
FPUL,DRn
DRm,DRn
Instruc-
Execu-
Lock
tion Issue
tion
Group Rate Latency Pattern Stage Start Cycles
LS
1
0
#1
— ——
FE
1
3/4
#36 — — —
FE
1
2/4
#36 — — —
FE
1
2/4
#36 — — —
FE
1
12/13 #37
F3 2
10
F1 11 1
FE
1
3/4
#36 — — —
FE
1
3/4
#36 — — —
FE
1
3/4
#36 — — —
LS
1
0
#1
— ——
FE
1
11/12 #37
F3 2
9
F1 10 1
FE
1
3/4
#36 — — —
FE
1
3/4
#36 — — —
LS
1
0
#1
— ——
LS
1
2
#2
— ——
LS
1
1/2
#2
— ——
LS
1
2
#2
— ——
LS
1
1
#2
— ——
LS
1
1/1
#2
— ——
LS
1
1
#2
— ——
LS
1
0
#1
— ——
FE
1
(7, 8)/9 #39
F1 2
6
CO
2
3/5
#40
F1 2
2
CO
2
3/5
#40
F1 2
2
FE
1
4/5
#38
F1 2
2
FE
1
(3, 4)/5 #38
F1 2
2
FE
1
(24, 25)/ #41
F3 2
23
26
F1 22 3
F1 2
2
FE
1
(3, 4)/5 #38
F1 2
2
FE
1
(7, 8)/9 #39
F1 2
6
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
Page 255 of 1076