HD6417750RF240DV Datasheet, PDF (461/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

SH7750, SH7750S, SH7750R Group
Section 13 Bus State Controller (BSC)
13.2.9 PCMCIA Control Register (PCR)
The PCMCIA control register (PCR) is a 16-bit readable/writable register that specifies the OE
and WE signal assertion/negation timing for the PCMCIA interface connected to areas 5 and 6.
The OE and WE signal assertion width is set by the wait control bits in the WCR2 register. For
details of access to PCMCIA, see section 13.3.7, PCMCIA Interface.
PCR is initialized to H'0000 by a power-on reset, but is not initialized by a manual reset or in
standby mode.
Bit: 15
14
13
12
11
10
9
8
A5PCW1 A5PCW0 A6PCW1 A6PCW0 A5TED2 A5TED1 A5TED0 A6TED2
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
A6TED1 A6TED0 A5TEH2 A5TEH1 A5TEH0 A6TEH2 A6TEH1 A6TEH0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bits 15 and 14—PCMCIA Wait (A5PCW1, A5PCW0): These bits specify the number of waits
to be added to the number of waits specified by WCR2 in a low-speed PCMCIA wait cycle. The
setting of these bits is selected when the PCMCIA interface access TC bit is cleared to 0.
Bit 15: A5PCW1
0
1
Bit 14: A5PCW0
0
1
0
1
Waits Inserted
0 (Initial value)
15
30
50
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
Page 409 of 1076