HD6417750RF240DV Datasheet, PDF (892/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 19 Interrupt Controller (INTC)
SH7750, SH7750S, SH7750R Group
19.3.4 Interrupt Source Register 00 (INTREQ00) (SH7750R Only)
The interrupt source register 00 (INTREQ00) indicates the origin of the interrupt request that has
been sent to the INTC. The states of the bits in this register is not affected by masking of the
corresponding interrupts by the settings in the INTPRI00 or INTMSK00 register. INTREQ00 is a
32-bit read-only register.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R R R R R R R R R R R R R R R R
Bit 31 to 0—Interrupt Request: Each of the non-reserved bits in this register indicates that there
is an interrupt request relevant to that bit. For the correspondence between the bits and interrupt
sources, see section 19.3.7, Bit Assignments of INTREQ00, INTMSK00, and INTMSKCLR00
(SH7750R Only).
Bits 31 to 0
0
1
Description
There is no interrupt request that corresponds to this bit
There is an interrupt request that corresponds to this bit.
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R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013