HD6417750RF240DV Datasheet, PDF (5/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Preface
The SH-4 (SH7750 Group: SH7750, SH7750S, SH7750R) microprocessor incorporates the 32-bit
SH-4 CPU and is also equipped with peripheral functions necessary for configuring a user system.
The SH7750 Group is built in with a variety of peripheral functions such as cache memory,
memory management unit (MMU), interrupt controller, timers, two serial communication
interfaces (SCI, SCIF), real-tim1e clock (RTC), user break controller (UBC), bus state controller
(BSC) and smart card interface. This LSI can be used in a wide range of multimedia equipment.
The bus controller is compatible with ROM, SRAM, DRAM, synchronous DRAM and PCMCIA,
as well as 64-bit synchronous DRAM 4-bank system and 64-bit data bus.
Target Readers: This manual is designed for use by people who design application systems using
the SH7750, SH7750S, or SH7750R.
To use this manual, basic knowledge of electric circuits, logic circuits and microcomputers is
required.
Purpose: This manual provides the information of the hardware functions and electrical
characteristics of the SH7750, SH7750S, and SH7750R.
The SH-4 Software Manual contains detailed information of executable instructions. Please read
the Software Manual together with this manual.
How to Use the Book:
• To understand general functions
→ Read the manual from the beginning.
The manual explains the CPU, system control functions, peripheral functions and electrical
characteristics in that order.
• To understanding CPU functions
→ Refer to the separate SH-4 Software Manual.
Explanatory Note: Bit sequence: upper bit at left, and lower bit at right
List of Related Documents: The latest documents are available on our Web site. Please make
sure that you have the latest version.
(http://www.renesas.com/)
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
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