HD6417750RF240DV Datasheet, PDF (826/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
SH7750, SH7750S, SH7750R Group
Framing error occurrence
Bits 7 to 0
No
in SCFDR2 = H'10?
Yes
PER or FER bit
Yes
in SCFSR2 set to 1?
No
Read receive FIFO
Normal error handling
Flow chart:
When flaming error (SCFSR.ER=1) is occurred, bit7 to
bit0 should be read out from SCFDR2. If bit7 to bit0
equals H'10, contents of the receive FIFO should be
read. When the data received last is not accompanied
with flaming error (SCFSR2.FER=0) both overrun error
handling and flaming error handling shoud be
conducted.
Error handling
No
Last data?
Yes
Overrun error handling
+
framing error handling
Figure 16.14 Overrun Error Flag
Page 774 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013