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HD6417750RF240DV Datasheet, PDF (713/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series
SH7750, SH7750S, SH7750R Group
15.2.4 Transmit Data Register (SCTDR1)
Bit: 7
6
5
Section 15 Serial Communication Interface (SCI)
4
3
2
1
0
Initial value: 1
1
1
1
1
1
1
1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
SCTDR1 is an 8-bit register that stores data for serial transmission.
When the SCI detects that SCTSR1 is empty, it transfers the transmit data written in SCTDR1 to
SCTSR1 and starts serial transmission. Continuous serial transmission can be carried out by
writing the next transmit data to SCTDR1 during serial transmission of the data in SCTSR1.
SCTDR1 can be read or written to by the CPU at all times.
SCTDR1 is initialized to H'FF by a power-on reset or manual reset, in standby mode, and in the
module standby state.
15.2.5 erial Mode Register (SCSMR1)
Bit: 7
C/A
Initial value: 0
R/W: R/W
6
CHR
0
R/W
5
PE
0
R/W
4
3
2
1
0
O/E STOP MP CKS1 CKS0
0
0
0
0
0
R/W R/W R/W R/W R/W
SCSMR1 is an 8-bit register used to set the SCI's serial transfer format and select the baud rate
generator clock source.
SCSMR1 can be read or written to by the CPU at all times.
SCSMR1 is initialized to H'00 by a power-on reset or manual reset, in standby mode, and in the
module standby state.
Bit 7—Communication Mode (C/A): Selects asynchronous mode or synchronous mode as the
SCI operating mode.
Bit 7: C/A
0
1
Description
Asynchronous mode
Synchronous mode
(Initial value)
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
Page 661 of 1076