HD6417750RF240DV Datasheet, PDF (328/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 9 Power-Down Modes
9.8.1 In Reset
Power-On Reset
CKIO
RESET
PLL stabilization
time
SH7750, SH7750S, SH7750R Group
SCK2
STATUS Normal
Reset
Manual Reset
0–5 Bcyc
0–30 Bcyc
Figure 9.1 STATUS Output in Power-On Reset
Normal
CKIO
RESET^*
Must be asserted for
t_RESW or longer
SCK2
STATUS Normal
Reset
Normal
≥ 0 Bcyc
0–30 Bcyc
Note: * In a manual reset, STATUS = HH (reset) is set and an internal reset started after waiting
until the end of the currently executing bus cycle.
Figure 9.2 STATUS Output in Manual Reset
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R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013