HD6417750RF240DV Datasheet, PDF (1116/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Appendix H Power-On and Power-Off Procedures
SH7750, SH7750S, SH7750R Group
⎯ When the LSI is mounted on a board and connected to other elements, ensure that –0.3 V <
Vin < V_DDQ + 0.3 V. In addition, the time limit for the fall of power supply V_DDQ and power
supply V_DD from the minimum values in the LSI’s guaranteed operation voltage range (V_DDQ
(min.) and V_DD (min.)) to GND (0 V) is 150 ms (max.), as shown in figure H.2. The product
may be damaged if this time limit is exceeded. It is recommended that the power-off
sequence be completed in as short a time as possible.
H.3 Common Stipulations for Power-On and Power-Off
1. Always ensure that V_DDQ = V_DD−CPG = V_DD−RTC = V . _{DD−PLL1/2}
Refer to 9.8.5, Hardware Standby Mode Timing (SH7750S, SH7750R Only), regarding V_DD−RTC
in hardware standby mode on the SH7750S and SH7750R.
2. Ensure that −0.3 V < V_DD < V_DDQ + 0.3 V.
3. Ensure that V_SS = V_SSQ = V_{SS−PLL1/2} = V_SS−CPG = V_SS−RTC = GND (0 V).
The product may be damaged if conditions 1., 2., and 3. above are not satisfied.
[V]
Power-on
Power supply
V_DDQ
Power supply
V_DD
Power-off
0.3 V (max)
0.3 V (max)
GND
[t]
Figure H.1 Power-On Procedure 1
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R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013