HD6417750RF240DV Datasheet, PDF (654/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 14 Direct Memory Access Controller (DMAC)
SH7750, SH7750S, SH7750R Group
14.4 Examples of Use
14.4.1 Examples of Transfer between External Memory and an External Device with
DACK
Examples of transfer of data in external memory to an external device with DACK using DMAC
channel 1 are considered here.
Table 14.10 shows the transfer conditions and the corresponding register settings.
Table 14.10 Conditions for Transfer between External Memory and an External Device
with DACK, and Corresponding Register Settings
Transfer Conditions
Transfer source: external memory
Transfer source: external device with DACK
Number of transfers: 32
Transfer source address: decremented
Transfer destination address: (setting invalid)
Transfer request source: external pin (DREQ1)
edge detection
Bus mode: burst
Transfer unit: word
No interrupt request at end of transfer
Channel priority order: 2 > 0 > 1 > 3
Register
SAR1
DAR1
DMATCR1
CHCR1
DMAOR
Set Value
H'0C000000
(Accessed by DACK)
H'00000020
H'000022A5
H'00000201
Page 602 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013