HD6417750RF240DV Datasheet, PDF (690/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 14 Direct Memory Access Controller (DMAC)
SH7750, SH7750S, SH7750R Group
Table 14.13 Register Configuration
Chan-
nel Name
Abbre-
viation
Read/
Area 7
Write Initial Value P4 Address Address
0
DMA source address SAR0
register 0
R/W^*2 Undefined H'FFA00000 H'1FA00000
DMA destination
address register 0
DAR0
R/W^*2 Undefined H'FFA00004 H'1FA00004
DMA transfer
count register 0
DMATCR0 R/W^*2 Undefined H'FFA00008 H'1FA00008
DMA channel control CHCR0
register 0
R/W^*1*2 H'00000000 H'FFA0000C H'1FA0000C
1
DMA source address SAR1
register 1
R/W Undefined H'FFA00010 H'1FA00010
DMA destination
address register 1
DAR1
R/W Undefined H'FFA00014 H'1FA00014
DMA transfer
count register 1
DMATCR1 R/W Undefined H'FFA00018 H'1FA00018
DMA channel control CHCR1
register 1
R/W^*1 H'00000000 H'FFA0001C H'1FA0001C
2
DMA source address SAR2
register 2
R/W Undefined H'FFA00020 H'1FA00020
DMA destination
address register 2
DAR2
R/W Undefined H'FFA00024 H'1FA00024
DMA transfer
count register 2
DMATCR2 R/W Undefined H'FFA00028 H'1FA00028
DMA channel control CHCR2
register 2
R/W^*1 H'00000000 H'FFA0002C H'1FA0002C
3
DMA source address SAR3
register 3
R/W Undefined H'FFA00030 H'1FA00030
DMA destination
address register 3
DAR3
R/W Undefined H'FFA00034 H'1FA00034
DMA transfer
count register 3
DMATCR3 R/W Undefined H'FFA00038 H'1FA00038
DMA channel control CHCR3
register 3
Com- DMA operation
mon register
DMAOR
R/W^*1 H'00000000 H'FFA0003C H'1FA0003C
R/W^*1 H'00000000 H'FFA00040 H'1FA00040
Access
Size
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Page 638 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013