HD6417750RF240DV Datasheet, PDF (355/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

SH7750, SH7750S, SH7750R Group
Section 10 Clock Oscillation Circuits
Bit 5—Reset Select (RSTS): Specifies the kind of reset to be performed when WTCNT
overflows in watchdog timer mode. This setting is ignored in interval timer mode.
Bit 5: RSTS
0
1
Description
Power-on reset
Manual reset
(Initial value)
Bit 4—Watchdog Timer Overflow Flag (WOVF): Indicates that WTCNT has overflowed in
watchdog timer mode. This flag is not set in interval timer mode.
Bit 4: WOVF
0
1
Description
No overflow
WTCNT has overflowed in watchdog timer mode
(Initial value)
Bit 3—Interval Timer Overflow Flag (IOVF): Indicates that WTCNT has overflowed in
interval timer mode. This flag is not set in watchdog timer mode.
Bit 3: IOVF
0
1
Description
No overflow
WTCNT has overflowed in interval timer mode
(Initial value)
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
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