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HD6417750RF240DV Datasheet, PDF (791/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series | |||
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SH7750, SH7750S, SH7750R Group
Section 16 Serial Communication Interface with FIFO (SCIF)
Bit 6âTransmit End (TEND): Indicates that there is no valid data in SCFTDR2 when the last
bit of the transmit character is sent, and transmission has been ended.
Bit 6: TEND
0
Description
Transmission is in progress
[Clearing conditions]
⢠When transmit data is written to SCFTDR2, and 0 is written to TEND
after reading TEND = 1
⢠When data is written to SCFTDR2 by the DMAC
1
Transmission has been ended
(Initial value)
[Setting conditions]
⢠Power-on reset or manual reset
⢠When the TE bit in SCSCR2 is 0
⢠When there is no transmit data in SCFTDR2 on transmission of the last
bit of a 1-byte serial transmit character
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
Page 739 of 1076
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