HD6417750RF240DV Datasheet, PDF (564/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 13 Bus State Controller (BSC)
SH7750, SH7750S, SH7750R Group
SH7750, SH7750S, SH7750R
CKIO
CSn
BS
RD/FRAME
RD/WR
D63–D0
RDY
MPX device
CLK
CS
BS
FRAME
WE
I/O63–I/O0
RDY
Figure 13.57 Example of 64-Bit Data Width MPX Connection
The MPX interface timing is shown below.
When the MPX interface is used for areas 1 to 6, a bus size of 32 or 64 bits should be specified in
BCR2.
For wait control, waits specified by WCR2 and wait insertion by means of the RDY pin can be
used.
In a read, one wait cycle is automatically inserted after address output, even if WCR2 is cleared to
0.
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R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013