HD6417750RF240DV Datasheet, PDF (435/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

SH7750, SH7750S, SH7750R Group
Section 13 Bus State Controller (BSC)
13.2.3 Bus Control Register 3 (BCR3) (SH7750R Only)
Bus control register 3 (BCR3) is a 16-bit readable/writable register that specifies the selection of
either the MPX interface or the SRAM interface and specifies the burst length when the
synchronous DRAM interface is used.
BCR3 is initialized to H'0000 by a power-on reset, but is not initialized by a manual reset or in
standby mode. No external memory space other than area 0 should be accessed before register
initialization has been completed.
Bit: 15
14
13
12
11
10
9
8
MEMMODE A1MPX A4MPX —
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
SDBL
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R/W
Bit 15⎯A1MPX/A4MPX Enable (MEMMODE): Determines whether or not the selection of
either the MPX interface or the SRAM interface is by A1MPX and A4MPX rather than by
MEMMPX.
Bit 15: MEMMODE
0
1
Description
MPX or SRAM interface is selected by MEMMPX
(Initial value)
MPX or SRAM interface is selected by A1MPX and A4MPX
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
Page 383 of 1076