HD6417750RF240DV Datasheet, PDF (978/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 22 Electrical Characteristics
SH7750, SH7750S, SH7750R Group
Table 22.25 Clock and Control Signal Timing (HD6417750RBP200 (V),
HD6417750RBG200 (V), HD6417750RBA240HV*²)
V_DDQ = 3.0 to 3.6 V, V_DD = 1.5 V, T_a = –20 to +75°C*³, C_L = 30 pF
Item
Symbol Min
EXTAL
PLL1 6-times/PLL2
f
16
EX
clock input operation
frequency _{PLL1 12-times/PLL2}
f_EX
14
operation
PLL1/PLL2 not operating f_EX
1
EXTAL clock input cycle time
t
30
EXcyc
EXTAL clock input low-level pulse width t
3.5
EXL
EXTAL clock input high-level pulse width t
3.5
EXH
EXTAL clock input rise time
t
—
EXr
EXTAL clock input fall time
t_EXf
—
CKIO clock PLL1/PLL2 operating
f
25
OP
output
PLL1/PLL2 not operating f_OP
1
CKIO clock output cycle time
t_cyc
10
CKIO clock output low-level pulse width t_CKOL1
1
CKIO clock output high-level pulse width t
1
CKOH1
CKIO clock output rise time
t
—
CKOr
CKIO clock output fall time
t
—
CKOf
CKIO clock output low-level pulse width t
3
CKOL2
CKIO clock output high-level pulse width t_CKOH2
3
Power-on oscillation settling time
t
10
OSC1
Power-on oscillation settling time/mode t_OSCMD
10
settling
SCK2 reset setup time
SCK2 reset hold time
MD reset setup time
MD reset hold time
RESET assert time
t_SCK2RS
20
t
20
SCK2RH
t
3
MDRS
t
20
MDRH
t
20
RESW
PLL synchronization settling time
t
200
PLL
Standby return oscillation settling time 1 t_OSC2
5
Max Unit Figure
34
MHz
17
34
1000
—
—
4
4
100
100
1000
—
—
3
3
—
—
—
—
ns 22.1
ns 22.1
ns 22.1
ns 22.1
ns 22.1
MHz
MHz
ns 22.2 (1)
ns 22.2 (1)
ns 22.2 (1)
ns 22.2 (1)
ns 22.2 (1)
ns 22.2 (2)
ns 22.2 (2)
ms 22.3, 22.5
ms 22.3, 22.5
—
ns 22.11
—
ns 22.3, 22.5, 22.11
—
t
22.12
cyc
—
ns 22.3, 22.5, 22.12
—
t
22.3, 22.4, 22.5,
cyc
22.6, 22.11
—
μs 22.9, 22.10
—
ms 22.4, 22.6
Page 926 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013