HD6417750RF240DV Datasheet, PDF (932/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 21 High-performance User Debug Interface (H-UDI)
SH7750, SH7750S, SH7750R Group
ASEBRK/BRKACK
TCK
TMS
TRST
Break
control
Interrupt/reset
etc.
TAP
controller
Decoder
TDI
*
TDO
MUX
SDIR
*
SDINT
SDDRH
SDDRL
Note: * Provided only in the SH7750R.
Figure 21.1 Block Diagram of H-UDI Circuit
Page 880 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013