HD6417750RF240DV Datasheet, PDF (775/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

SH7750, SH7750S, SH7750R Group
Section 15 Serial Communication Interface (SCI)
Workaround 2
Do not select settings a., b., and c. at the same time.
Multiplexer
(switches between clock
mode and SCK input)
Mode setting signal
Edge trigger FF
DQ
B
A
SH7750
MD0/SCK
CKIO
Figure 15.26 Example Countermeasure on SH7750
• Clock Timing
Make sure that the timing of the clock input to the SCK pin, including the delay from edge
trigger FF and the multiplexer in figure 15.26, conforms to that shown below.
CKIO
SCK
tSCKH tSCKS
tSCKH tSCKS
Figure 15.27 Clock Input Timing of SCK Pin
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
Page 723 of 1076