HD6417750RF240DV Datasheet, PDF (406/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 12 Timer Unit (TMU)
SH7750, SH7750S, SH7750R Group
4. Use bits CKEG1 and CKEG0 in TCR to specify whether the rising or falling edge of the
TCLK signal is to be used to set the timer counter (TCNT) value in the input capture register
(TCPR2).
This function cannot be used in standby mode.
When input capture occurs, the TCNT2 value is set in TCPR2 only when the ICPF bit in TCR2 is
0. Also, a new DMAC transfer request is not generated until processing of the previous request is
finished.
Figure 12.7 shows the operation timing when the input capture function is used (with TCLK rising
edge detection).
TCNT value
TCOR
TCOR value set in TCNT
on underflow
H'00000000
TCLK
Time
TCPR2
TCNT value set
TICPI2
Figure 12.7 Operation Timing when Using Input Capture Function
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R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013