HD6417750RF240DV Datasheet, PDF (434/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 13 Bus State Controller (BSC)
SH7750, SH7750S, SH7750R Group
Bits 2n + 1, 2n—Area n (1 to 6) Bus Width Specification (AnSZ1, AnSZ0): These bits specify
the bus width of area n (n = 1 to 6).
(Bit 0): PORTEN Bit 2n + 1: AnSZ1
0
0
1
1
0
1
Bit 2n: AnSZ0
0
1
0
1
0
1
0
1
Description
Bus width is 64 bits
Bus width is 8 bits
Bus width is 16 bits
Bus width is 32 bits (Initial value)
Reserved (Setting prohibited)
Bus width is 8 bits
Bus width is 16 bits
Bus width is 32 bits
Bit 1—Reserved: This bit is always read as 0, and should only be written with 0.
Bit 0—Port Function Enable (PORTEN): Specifies whether pins D51 to D32 are used as a 20-
bit port. When this function is used, a bus width of 8, 16, or 32 bits should be set for all areas.
Bit 0: PORTEN
0
1
Description
D51 to D32 are not used as a port
D51 to D32 are used as a port
(Initial value)
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R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013