HD6417750RF240DV Datasheet, PDF (378/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 11 Realtime Clock (RTC)
SH7750, SH7750S, SH7750R Group
Bit 7—Periodic Interrupt Flag (PEF): Indicates interrupt generation at the interval specified by
bits PES2–PES0. When this flag is set to 1, a periodic interrupt is generated.
Bit 7: PEF
0
1
Description
Interrupt is not generated at interval specified by bits PES2–PES0
[Clearing condition]
When 0 is written to PEF
Interrupt is generated at interval specified by bits PES2–PES0
[Setting conditions]
• Generation of interrupt at interval specified by bits PES2–PES0
• When 1 is written to PEF
Bits 6 to 4—Periodic Interrupt Enable (PES2–PES0): These bits specify the period for periodic
interrupts.
Bit 6: PES2 Bit 5: PES1 Bit 4: PES0 Description
0
0
0
No periodic interrupt generation
(Initial value)
1
Periodic interrupt generated at 1/256-second intervals
1
0
Periodic interrupt generated at 1/64-second intervals
1
Periodic interrupt generated at 1/16-second intervals
1
0
0
Periodic interrupt generated at 1/4-second intervals
1
Periodic interrupt generated at 1/2-second intervals
1
0
Periodic interrupt generated at 1-second intervals
1
Periodic interrupt generated at 2-second intervals
Bit 3— Oscillation Circuit Enable (RTCEN): Controls the operation of the RTC crystal
oscillation circuit.
Bit 3: RTCEN
0
1
Description
RTC crystal oscillation circuit halted
RTC crystal oscillation circuit operating
(Initial value)
Page 326 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013