HD6417750RF240DV Datasheet, PDF (1020/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 22 Electrical Characteristics
SH7750, SH7750S, SH7750R Group
CKIO
BANK
Tc1
Tc2
Tc3
Tc4/Td1
Td2
Td3
Td4
t_AD
t_AD
Row
Precharge-sel
H/L
Address
CSn
RD/WR
RAS
CASS
DQMn
D63–D0
(read)
D63–D0
(write)
c0
t_CSD
t_RWD
t_RASD
t_CASD2 t_CASD2
t_DQMD
t_WDD
BS
CKE
DACKn
(SA: IO ← memory)
t_DACD
t_CSD
t_RWD
t_RASD
t_DQMD
t_RDS
t_RDH
d0
d1
d2
d3
t_WDD
t_BSD
t_BSD
t_DACD
t_DACD
Legend:
IO: DACK device
SA: Single address DMA transfer
DA: Dual address DMA transfer
DACK set to active-high
Figure 22.27 Synchronous DRAM Normal Read Bus Cycle: READ Command, Burst
((RASD = 1, CAS Latency = 3)
Page 968 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013