HD6417750RF240DV Datasheet, PDF (780/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
SH7750, SH7750S, SH7750R Group
16.1.3 Pin Configuration
Table 16.1 shows the SCIF pin configuration.
Table 16.1 SCIF Pins
Pin Name
Abbreviation
I/O
Function
Serial clock pin
SCK2/MRESET Input
Clock input
Receive data pin
MD2/RxD2
Input
Receive data input
Transmit data pin
Modem control pin
MD1/TxD2
CTS2
Output
I/O
Transmit data output
Transmission enabled
Modem control pin MD8/RTS2
I/O
Transmission request
Note:
After a power-on reset, these pins function as mode input pins MD1, MD2, and MD8. These
pins can function as serial pins by setting the SCIF operation with the TE, RE, and CKE1
bits in SCSCR2 and the MCE bit in SCFCR2. These pins are made to function as serial
pins by performing SCIF operation settings with the TE, RE, and CKE1 bits in SCSCR2 and
the MCE bit in SCFCR2. Break state transmission and detection can be set in the SCIF's
SCSPTR2 register.
Page 728 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013