HD6417750RF240DV Datasheet, PDF (398/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 12 Timer Unit (TMU)
SH7750, SH7750S, SH7750R Group
1. Channel 0 and 1 TCR bit configuration
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
UNF
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R/W
Bit: 7
—
Initial value: 0
R/W: R
6
5
4
3
2
1
0
—
UNIE CKEG1 CKEG0 TPSC2 TPSC1 TPSC0
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W
2. Channel 2 TCR bit configuration
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
ICPF UNF
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R/W R/W
Bit: 7
ICPE1
Initial value: 0
R/W: R/W
6
ICPE0
0
R/W
5
UNIE
0
R/W
4
CKEG1
0
R/W
3
CKEG0
0
R/W
2
TPSC2
0
R/W
1
TPSC1
0
R/W
0
TPSC0
0
R/W
3. TCR bit configuration for channels 3 and 4 (SH7750R only)
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
UNF
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R/W
Bit: 7
—
Initial value: 0
R/W: R
6
5
4
—
UNIE
—
0
0
0
R
R/W
R
3
2
1
0
— TPSC2 TPSC1 TPSC0
0
0
0
0
R
R/W R/W R/W
Page 346 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013