HD6417750RF240DV Datasheet, PDF (711/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

SH7750, SH7750S, SH7750R Group
Section 15 Serial Communication Interface (SCI)
Table 15.2 SCI Registers
Name
Abbreviation R/W
Initial
Area 7
Value P4 Address Address
Access
Size
Serial mode register SCSMR1
R/W H'00 H'FFE00000 H'1FE00000 8
Bit rate register
SCBRR1
R/W H'FF H'FFE00004 H'1FE00004 8
Serial control register SCSCR1
R/W H'00 H'FFE00008 H'1FE00008 8
Transmit data register SCTDR1
Serial status register SCSSR1
R/W H'FF
R/(W)^*1 H'84
H'FFE0000C H'1FE0000C 8
H'FFE00010 H'1FE00010 8
Receive data register SCRDR1
R
H'00 H'FFE00014 H'1FE00014 8
Serial port register
SCSPTR1
R/W
H'00^*2 H'FFE0001C H'1FE0001C 8
Notes: 1. Only 0 can be written, to clear flags.
2. The value of bits 2 and 0 is undefined.
15.2 Register Descriptions
15.2.1 Receive Shift Register (SCRSR1)
Bit: 7
6
5
4
3
2
1
0
R/W: —
—
—
—
—
—
—
—
SCRSR1 is the register used to receive serial data.
The SCI sets serial data input from the RxD pin in SCRSR1 in the order received, starting with the
LSB (bit 0), and converts it to parallel data. When one byte of data has been received, it is
transferred to SCRDR1 automatically.
SCRSR1 cannot be directly read or written to by the CPU.
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
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