HD6417750RF240DV Datasheet, PDF (366/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series

Section 11 Realtime Clock (RTC)
SH7750, SH7750S, SH7750R Group
Initialization
Name
Abbrevia-
Power-On Manual Standby Initial
tion
R/W Reset
Reset Mode Value
Area 7
P4 Address Address
Access
Size
Month RMONCNT R/W Counts
counter
Counts Counts Undefined H'FFC80018 H'1FC80018 8
Year
RYRCNT
counter
Second
alarm
register
RSECAR
Minute
alarm
register
RMINAR
Hour
alarm
register
RHRAR
Day-of-
week
alarm
register
RWKAR
Day
alarm
register
RDAYAR
Month
alarm
register
RMONAR
RTC
RCR1
control
register 1
RTC
RCR2
control
register 2
R/W Counts
Counts Counts
R/W Initialized^*1 Held
Held
R/W Initialized^*1 Held
Held
R/W Initialized^*1 Held
Held
R/W Initialized^*1 Held
Held
R/W Initialized^*1 Held
Held
R/W Initialized^*1 Held
Held
R/W Initialized Initialized Held
R/W Initialized Initialized Held
*²
Undefined H'FFC8001C H'1FC8001C 16
Undefined^*1 H'FFC80020 H'1FC80020 8
Undefined^*1 H'FFC80024 H'1FC80024 8
Undefined^*1 H'FFC80028 H'1FC80028 8
Undefined^*1 H'FFC8002C H'1FC8002C 8
Undefined^*1 H'FFC80030 H'1FC80030 8
Undefined^*1 H'FFC80034 H'1FC80034 8
H'00^*3
H'FFC80038 H'1FC80038 8
H'09^*4
H'FFC8003C H'1FC8003C 8
RTC
control
register
3^*5
RCR3
R/W Initialized Held
Held
H'00
H'FFC80050 H'1FC80050 8
Year
RYRAR
alarm
register^*5
R/W Held
Held
Held
Undefined H'FFC80054 H'1FC80054 16
Notes: 1. The ENB bit in each register is initialized.
2. Bits other than the RTCEN bit and START bit are initialized.
3. The value of the CF bit and AF bit is undefined.
4. The value of the PEF bit is undefined.
5. SH7750R only
Page 314 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013