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HD6417750RF240DV Datasheet, PDF (708/1132 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7750 Series | |||
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Section 15 Serial Communication Interface (SCI)
SH7750, SH7750S, SH7750R Group
⯠Synchronous mode
Serial data communication is synchronized with a clock. Serial data communication can be
carried out with other chips that have a synchronous communication function.
There is a single serial data transfer format.
Data length:
8 bits
Receive error detection: Overrun errors
⢠Full-duplex communication capability
The transmitter and receiver are mutually independent, enabling transmission and reception to
be executed simultaneously. Double-buffering is used in both the transmitter and the receiver,
enabling continuous transmission and continuous reception of serial data.
⢠On-chip baud rate generator allows any bit rate to be selected.
⢠Choice of serial clock source: internal clock from baud rate generator or external clock from
SCK pin
⢠Four interrupt sources
There are four interrupt sourcesâtransmit-data-empty, transmit-end, receive-data-full, and
receive-errorâthat can issue requests independently. The transmit-data-empty interrupt and
receive-data-full interrupt can activate the DMA controller (DMAC) to execute a data transfer.
⢠When not in use, the SCI can be stopped by halting its clock supply to reduce power
consumption.
Page 656 of 1076
R01UH0456EJ0702 Rev. 7.02
Sep 24, 2013
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